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Address spaces and stale translations

What this concept is​

A cached translation is a snapshot of a mapping, including access rights. It must be associated with the correct address space and reconciled when that mapping changes. This lab keys entries by (ASID,VPN) and invalidates the key on every map or unmap.

Why it matters here​

A mapping can be correct in the page table while a stale cached frame or permission still produces the wrong access. This is a coherence problem, not an offset-arithmetic problem. Treating VPN alone as identity can also mix two processes’ mappings.

Concrete example​

ASID 0 maps VPN 2 to frame 9; ASID 1 maps VPN 2 to frame 4. Alternating reads must preserve that distinction. Now warm a writable translation in ASID 0 and replace its permissions with read-only. The next write must miss and fail protection; retaining the old writable entry would violate the new contract.

Common confusion / misconception​

Removing a page-table entry does not inherently erase a separate cache snapshot. Copying the mapping object by reference can hide this bug in a simulator, because the cache appears to update itself. The supplied reference stores immutable frame/permission tuples so invalidation is observable.

How to use it​

Mutate mappings only through explicit map/unmap operations. Validate first, update the page table, invalidate the matching cache entry. Do not invalidate unrelated ASIDs as a shortcut when testing isolation. In a real system, identify all processors that may hold affected translations; a single local cache is not a shootdown protocol.

Check yourself​

Why can a static trace pass even if invalidation is missing? No mapping changes expose stale state. Why is an unbounded ASID integer simpler than hardware tags? Real tag reuse needs a correctness protocol; this model never reuses identities for a new process.

Mini drill or application​

Warm a mapping, remap its frame, then unmap it, testing after each step. Repeat with two ASIDs. Seed a missing-invalidation fault and retain the smallest sequence distinguishing the faulty and repaired implementations.

Read this only if stuck​

Return to isolation in OSTEP address spaces. Use the primary kernel flushing resource on the extension page for the implementation boundary.