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Module Quiz

Complete this quiz after finishing all concept and practice pages. Save your answers before opening separate quiz calibration.

Current Module Questions​

Question 1: Why Translate At All​

Name three capabilities that virtual memory gives the OS, none of which is achievable when programs emit physical addresses directly.

Question 2: Paging Math​

A process uses 48-bit virtual addresses with 4 KiB pages. How many bits are the offset, how many are the VPN, and how many PTEs would a single flat page table hold per process?

Question 3: Page-Table Walk Walkthrough​

Walk a 4-level (9+9+9+9+12) x86-64 translation for virtual address 0x0000_5555_5555_6000. Give the five fields.

Question 4: Walk Cost​

What is the worst-case memory-access cost of a TLB miss on a 4-level page-table walk, and how does a 2 MiB huge page change it?

Question 5: TLB Miss vs Page Fault​

Explain the difference between a TLB miss and a page fault.

Question 6: Minor vs Major Faults​

Give one example of each, and describe their order-of-magnitude cost difference.

Question 7: Replacement Simulation​

Reference string 1 2 3 4 1 2 5 1 2 3 4 5, 3 frames. Give the fault count under FIFO, LRU, and OPT.

Question 8: Belady's Anomaly​

State Belady's anomaly in one sentence.

Question 9: Working Set and Thrashing​

Define the working set W(t, tau) and explain why a system exhibits a sharp cliff rather than a slope when memory pressure increases.

Question 10: Kernel Allocators​

Why does the kernel use both the buddy allocator and the slab allocator?

Question 11: User Allocator Choice​

A long-running multithreaded service on 16 cores shows RSS of 24 GiB with 4 GiB live objects and 40% CPU time in __lll_lock_wait. Diagnose and propose a fix.

Question 12: Fragmentation Types​

Give one concrete example of internal fragmentation and one of external fragmentation.

Question 13: Copy-on-Write​

A Redis server with 20 GiB of data forks a child to do a background save. What is each process's RSS immediately after fork? What does writing to a page cost?

Question 14: mmap Flavors​

You need: (a) a 1 GiB zeroed scratch buffer, (b) shared memory between a parent and a child, (c) to read a 10 GiB file where you want the kernel to cache hot parts, (d) a persistent on-disk data structure that you want to manipulate in-memory with writes visible to other processes. Choose the right mmap flavor for each.

Question 15: Huge Pages Trade-off​

A workload's perf stat shows a very high dTLB-load-misses rate. You turn on transparent huge pages globally. Performance improves on some workloads and degrades on others. Explain one case each.

Interleaved Review Questions​

Prior Module Question 1 (S5 Module 1: Processes & Scheduling)​

Why does a context switch on x86-64 not require flushing the TLB on modern kernels?

Prior Module Question 2 (S4 Systems Programming: Process Memory Layout)​

Name the four traditional segments of a Unix process address space and whether each grows.

Prior Module Question 3 (S2 Module 1: Algorithm Analysis)​

The buddy allocator's "split down to order k, then coalesce on free" sequence: what is the asymptotic cost per allocation, and why?

Prior Module Question 4 (S1 Module 1: Proofs / Induction)​

Prove by induction that a buddy allocator that serves requests of exactly power-of-two sizes cannot produce external fragmentation (all free memory is always coalescible into usable blocks for some size class).

Prior Module Question 5 (S1 Module 3: Probability)​

If each of 100 threads independently hits one of 8 glibc arenas uniformly at random, what is the probability that all eight arenas are contended (each used by at least one thread)?

Self-Assessment and Remediation​

Mastery Level (90-100% correct):

  • Retrieval is strong; complete all module and semester evidence gates before advancing.

Proficient Level (75-89% correct):

  • Review only the missed concept pages and redo two problems of each missed type. Prioritize any questions about TLB cost and replacement policies.

Developing Level (60-74% correct):

  • Rework Cluster 2 (Page Tables and the TLB) and Cluster 3 (Page Replacement and Swapping). Redo Practice 1 and Practice 2. The gap is almost always page-table walk math or replacement-policy simulation.

Insufficient Level (<60% correct):

  • Return to the concept sequence from the start. The likely issue is that you are treating virtual memory as abstract rather than as a hardware + kernel system. Re-read Cluster 1 and redo the bit-split and page-table walk katas before advancing.

Progression boundary​

Quiz performance calibrates retrieval and reasoning. It does not replace runnable work, changed-case transfer, the module assessment or required semester evidence. Consult practice calibration for the additional independent cases.