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Performance prediction practice

  1. For a row-major 4-by-4 matrix of four-byte elements, list the first four addresses in each traversal relative to the base.
  2. Why does a matching row/column checksum alone still permit a shared bug?
  3. Can a zero CPU-time sample prove a traversal is free?
  4. Does a large column/row timing ratio establish the number of cache misses?
  5. Why compare 511 with 512, and why is that comparison not a clean proof of cache conflicts?
  6. If every tested case favors row traversal, must you invent a reversal to complete the lab?

Calibration​

  1. Row offsets 0,4,8,12; column offsets 0,16,32,48. Cache predictions need line/alignment assumptions.
  2. Both implementations can make the same mistake; compare against independent expected work.
  3. No, the sample may be below timer resolution.
  4. No; compiler, prefetch, TLB and other effects can contribute.
  5. It explores stride sensitivity, but also changes total data size and other interactions.
  6. No. State the observed scope, uncertainty and next experiment honestly.