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Locality experiments and defensible performance claims

This required 18–26-hour package replaces the former 2–3-hour matrix traversal lab: lessons and prediction 5–7, experiments/assembly/evidence 8–12, assessment and delayed transfer 5–7. Original ISA, datapath, pipeline, virtual-memory and device concepts remain required; See the reconciled semester workload.

Sequence​

  1. Address models.
  2. Benchmark contracts.
  3. Variability and causal limits.
  4. Prediction practice, runnable lab, and PE1–PE6 assessment.

Carry forward Module 2’s allocation and size reasoning. The supplied harness uses bounded dimensions; do not remove those bounds without revisiting arithmetic and allocation checks. A passing measurement report may conclude that the evidence is inconclusive.

Selective resources​

Reuse Computer Organization and Design readings for caches and performance. MIT 6.004 Computation Structures provides optional performance/cache lectures and worksheets. Intel’s manuals are a target-specific reference, not a requirement for ARM learners. Linux perf documentation explains counter-access constraints; counters are optional here. Sources checked on 2026-10-23. No purchases or full-book conversion required.

The original lab measures repeated warm-cache traversals using process CPU time. It does not measure network latency, energy, cache-miss counts, cold-start behavior or concurrent throughput. The separate required specialized-platform benchmark remains part of the semester strand. Independent review and learner timing pilots remain pending.