Performance evidence: PE1–PE6

Score each gate 0 (absent/wrong), 1 (materially prompted), 2 (independently correct with evidence and limits), or 3 (also defends changed cases). Every gate requires 2 or above; speedup is not a passing criterion.

• PE1 — Model: derive address order and state element-width, alignment and cache assumptions separately from observed hardware facts.
• PE2 — Correctness: demonstrate independent checksum validation and show that a deliberately wrong traversal is rejected before accepting timing data.
• PE3 — Experiment: reproduce alternating-order repeated measurements, document timed boundaries and CPU-time semantics, retain raw data and address insufficient resolution.
• PE4 — Generated code: inspect target-appropriate assembly and identify loop/vector/call behavior; explain how it affects interpretation without assuming a fixed ISA.
• PE5 — Inference: report medians/ranges, uncertainty, an alternative explanation and a discriminating follow-up. Do not claim counter evidence from timing alone.
• PE6 — Transfer and integrity: after a day, predict a changed dimension/workload without the key, retain actual observations and disclose assistance. Never fabricate an anomalous result or environment detail.

Repair weak gates with fresh evidence. Use the calibration key after an attempt. Retain original module and required semester-strand work.