Module 3: Computer Organization & Architecture
This page aggregates the generated reference routes used by the learner-facing module.
- Semester:
semester-04-systems-programming - App:
systems
Read only if stuck
- COD: 1.1 Introduction
- COD: 1.2 Below Your Program
- COD: 1.3 Under the Covers
- COD: 2.1 Introduction
- COD: 2.3 Operands of the Computer Hardware
- COD: 2.5 Representing Instructions in the Computer
- COD: 2.8 Supporting Procedures
- COD: 2.12 Translating and Starting a Program
- COD: 2.13 A C Sort Example
- COD: 2.14 Arrays versus Pointers
- COD: 2.16 Real Stuff -- ARM
- COD: 2.17 Real Stuff -- x86
- CODE: Registers and Busses
- CODE: CPU Control Signals
- CODE: Loops, Jumps, and Calls
- COD: 2.4 Signed and Unsigned Numbers
- COD: 2.6 Logical Operations
- COD: 2.7 Instructions for Making Decisions
- COD: 3.1 Introduction
- COD: 3.2 Addition and Subtraction
- COD: 3.3 Multiplication
- COD: 3.4 Division
- COD: 3.5 Floating Point
- COD: 3.5 Floating Point (Part 3)
- CODE: The Arithmetic Logic Unit
- CODE: Floating-Point Approximation and Math Coprocessors
- COD: 5.1 Introduction
- COD: 5.1 Introduction (Part 3)
- COD: 5.2 The Basics of Caches
- COD: 5.2 Caches (Part 6)
- COD: 5.2 Caches (Part 9)
- COD: 5.3 Measuring and Improving Cache Performance
- COD: 5.8 Parallelism and Memory Hierarchies -- Cache Coherence
- COD: 5.10 Real Stuff -- Memory Hierarchies
- COD: 5.11 Fallacies and Pitfalls
- COD: 4.5 Overview of Pipelining
- COD: 4.6 Pipelined Datapath and Control
- COD: 4.7 Data Hazards
- COD: 4.8 Control Hazards
- COD: 4.11 Real Stuff -- Opteron Pipeline
- COD: 7.6 SIMD and Vector
- COD: 3.6 Parallelism and Computer Arithmetic -- Associativity
- COD: 4.9 Exceptions
- COD: 5.4 Virtual Memory
- COD: 5.4 Virtual Memory (Part 5)
- COD: 5.4 Virtual Memory (Part 8)
- COD: 5.4 Virtual Memory (Part 11)
- COD: 6.5 Connecting Processors, Memory, and I/O
- COD: 6.5 (Part 5)
- CODE: Peripherals
- COD: 1.4 Performance
- COD: 1.4 Performance (Part 3)
- COD: 7.10 Roofline
- COD: 7.10 Roofline (Part 4)
- COD 2.1 Introduction
- COD 2.8 Supporting Procedures
- COD 2.13 A C Sort Example
- COD 3.2 Addition and Subtraction
- COD 2.7 Decisions
- COD 5.1 Introduction
- COD 5.2 Caches (Part 6)
- COD 5.3 Measuring and Improving Cache Performance
- COD 4.5 Overview of Pipelining
- COD 4.7 Data Hazards
- COD 5.4 Virtual Memory
- COD 7.10 Roofline