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Book Exercise Lanes

This module's exercise system is book-driven. Use these local chunks for targeted volume after you have already learned the concept from the guide.

How To Use This Page​

  1. Finish the relevant concept page first.
  2. Solve at least one problem of your own from memory.
  3. Only then open the matching exercise lane.
  4. Keep a mistake log with tags such as off-by-one on buffer, signed overflow is UB, dangling after realloc, wrong byte order on wire, missing trailing NUL, unaligned access, or sizeof does not sum fields.

Lane 1: Representation (Bits, Integers, Floats)​

Use this lane when the issue is reading or manipulating bit patterns.

Target outcomes:

  • 10 hex/binary/decimal conversions, including negative values in two's complement
  • 6 exercises on &, |, ^, ~, <<, >> (set, clear, toggle, extract, count bits)
  • 4 IEEE 754 encode/decode exercises by hand
  • 2 written explanations of signed-vs-unsigned surprises (comparison, conversion)

Lane 2: Pointers, Arrays, Function Pointers​

Use this lane when pointer code "kind of runs" but you cannot draw the diagram.

Target outcomes:

  • 10 programs or diagrams translating pointer code into a memory picture before running
  • 6 exercises implementing strlen-style functions using pure pointer arithmetic
  • 4 function-pointer exercises including a dispatch table and a qsort comparator
  • 2 written analyses of int *a[n] versus int (*a)[n]

Lane 3: Memory Layout and Allocation​

Use this lane when you can manipulate pointers but cannot account for where memory comes from or goes.

Target outcomes:

  • 4 exercises placing each variable in a small program into its correct segment
  • 3 stack-frame traces on paper (simple, recursive, with spilled locals)
  • 2 toy allocators: one bump, one single free-list
  • 2 realloc exercises including "what if it moves?" handling

Lane 4: Memory Errors, Tools, and Hardening​

Use this lane when the theory is clear but you need fluency with the tools and idioms.

Target outcomes:

  • 3 buggy programs run through ASan and fixed
  • 2 buggy programs run through Valgrind Memcheck and fixed
  • 1 program run through clang --analyze or -fanalyzer and fixed
  • 1 written narrative explaining how a tool located a bug you could not find by reading

Lane 5: Structs, Alignment, Endianness, Bit Fields​

Use this lane when your layout predictions are off or when you need to write wire formats.

Target outcomes:

  • 5 sizeof and offsetof predictions across 5 different struct orderings
  • 3 reorderings that reduce size, each with a _Static_assert freezing the layout
  • 2 wire-format exercises writing explicit big-endian encode/decode (no htonl)
  • 1 bit-field / packed-struct exercise parsing a real protocol header (UDP, Ethernet, or a custom format)

Self-Curated Problem Set​

Build a custom set with these minimums:

  • 5 bit-pattern and arithmetic problems
  • 5 pointer-and-arithmetic prediction problems
  • 5 memory-layout or allocator problems
  • 5 memory-error diagnosis problems using ASan / Valgrind
  • 3 struct / endianness wire-format problems

Completion Checklist​

  • Completed at least one lane in full
  • Retained actual mistakes, their evidence and corrections; if none occurred, label a deliberately faulty example and show how to detect it. No minimum personal-error count.
  • Drew at least 10 memory diagrams before writing the corresponding code
  • Fixed at least 3 bugs that ASan or Valgrind located
  • Wrote at least 3 wire-format encode/decode exercises that round-trip across simulated endianness

Required ownership extension​

Complete Ownership under growth and failure and every MP1–MP6 gate. Its 20–30 hours replace the old 2–3-hour growable-buffer lab; original module practice remains required. See the reconciled semester workload.